Cryptography Reference
In-Depth Information
11:
R 3 [0]
R 3 [0]
Count[ i ]
12: clock all registers
13: end for
14: for i
0to99 do
15: clock the A5/1 automaton
16: end for
=
2.8.4 E0: Bluetooth Encryption
E0 is another stream cipher which is used in the Bluetooth standard (see Ref. [18]).
As in A5/1, E0 is an automaton which generates keystreams which are simply XORed
to the plaintext as in the Vernam cipher. E0 generates one bit every clock cycle and
frames of 2745 bits. After a frame is generated, the E0 automaton is reset to another
state.
The state of the E0 automaton is described by the content of four linear feedback
shift registers LFSR 1 , LFSR 2 , LFSR 3 , LFSR 4 of length 25, 31, 33, 39 respectively, and
the content of two 2-bit registers c t 1 and c t . Every clock cycle, the four registers are
clocked, c t ,ismovedto c t 1 , and c t is updated by using c t 1 , c t , and the registers.
More precisely, one bit x t
is output from LFSR i at every clock cycle. A summator
x t and represents it in binary using three bits y t y t y t .
The automaton outputs a new keystream bit z t =
x t +
x t +
x t +
computes y t =
y t
c t where c t =
c t c t . The new
c t + 1 c t + 1
value c t + 1 =
of c t is computed by
c t + 1 =
s t + 1
c t
c t 1
c t + 1 =
s t + 1
c t
c t 1
c t 1
where
y t +
c t
s t + 1 =
.
2
E0 is actually a little more complicated. E0 is based on two levels of the above
automaton as depicted in Fig. 2.31. Formally, the encryption algorithm E0 takes the
logical address BD ADDR of the master (Bluetooth is based on master-slave protocols)
which is represented on 48 bits, the clock value of the master CLK which is represented
on 26 bits, and an encryption key K c of 128 bits. The first level is used in order to
initialize the automaton for every frame. The second level generates frames with the
initialized automaton. Concretely, the encryption key K c is first linearly shrunk and
then expanded into a 128-bit key so that the effective key length can be lowered for
regulation purposes. Then, the reexpanded encryption key, the master address, and the
master clock enter into the LFSR of the automaton which is clocked. After running
the automaton, 128 bits are output, which serve as the initial value of the second-level
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