PipelinedWormhole Routers - Microarchitecture of Network-on-Chip Routers - page 79

0 1 2 3 4 5 6

cc
SA-DQ-ST

H LT-BW RC-EB LT-BW

su

cc
SA-DQ-ST

B LT-BW EB LT-BW

cc
SA-DQ-ST

T LT-BW EB LT-BW

su

cc
SA-DQ-ST H LT-BW RC-EB LT-BW

su

Fig. 5.8 The operation of the pipelined router that includes an RC pipeline register both in the
control and the datapath. The pipeline register of the datapaths acts as a 1-slot elastic buffer. The
EB task of the diagram implies writing to this intermediate EB

in this cycle enqueues the body flit while it dequeues the head flit that was stored in
the previous cycle. The same happens also in cycle 3 for the body and the tail flit. At
the end of cycle 3, the tail flit of the first packet has left the input buffer and moved
to the intermediate EB. Thus, at the beginning of cycle 4, the frontmost flit of the
input buffer is the head flit of the new packet. Since the tail flit that occupies the
intermediate EB is leaving, the head flit will take its position at the end of cycle 4,
completing RC in parallel. Since the tail flit updated the outAvailable flagincycle
4, the head flit currently in the EB can make a request in cycle 5 even for the same
output port. In this way, the flits of the two consecutive packets arriving at the same
input pass through the router un-interrupted without experiencing any idle cycles,
even if they are heading to the same output port.

5.3 The Switch Allocation Pipeline Stage

The second interesting form of pipelining for the router is the separation of SA
from ST, which can be combined with unpipelined or pipelined RC organizations
(either in the control or both the control and datapath) and give efficient pipelined
architectures. The per-output arbiters that implement the SA stage receive the
requests from all inputs and produce a valid input-output match. In contrast to the
static and local nature of the RC operation, SA is a function of several dynamic
parameters that create dependencies across inputs and make the design of SA
pipeline stage challenging. In the following sections, three different approaches are
presented, that reveal those dependencies and offer realistic solutions.

5.3.1 Elementary Organization

Pipelining the router at the end of the SA stage means that the grant signals
produced by the arbiters are first registered and then, in the next cycle, distributed