Introduction to Network-on-Chip Design - Microarchitecture of Network-on-Chip Routers - page 10

Transaction
Read/Write

Send a packet from/to NI

Transport
Packets/Routing

Send/Receive data from router to router

Physical
Wires/Clocks

Fig. 1.8 Layered approach in network-on-chip design

technology node used for the system. For example, a network can employ different
link widths and flow control mechanisms (Mishra et al. 2011 ) or even clocking at
the physical layer without affecting the operation of the transport and transaction
layers of communication.

1.6 Take-Away Points

The Network-on-chip paradigm solves the problem of on-chip communication
by applying at the silicon chip level well established networking principles,
after suitably adapting them to the silicon chip characteristics and to application
demands. Network-on-chip design evolves in a layered approach that allows the
transformation of abstract load/store transactions to packets of bits that travel in
the network following the correct path from their source to their destination. The
transformation between transactions and packets is done at the network interfaces,
while the routers provide arbitrary lossless connectivity between inputs and outputs
and allow for the implementation of arbitrary network topologies.