High-Speed Allocators for VC-Based Routers - Microarchitecture of Network-on-Chip Routers - page 142

smaller wormhole router has elastic buffers at its inputs and output ports, then each
flit of the VC-based routers will spend three cycles in the VC-based router: one for
moving from the input VC to the input of the wormhole router; the next to switch to
the selected output port of the sub-router, and the last one to move from the output
of the sub-router to the output of the VC-based router.
Using the freedom offered by input speed up we can design hierarchical
switching modules similar to the ones presented in Sect. 3.7 for wormhole routers
that instead of elastic buffers would include Elastistores at each merging point and
in the place of an arbiter and a multiplexer would contain a combined allocator
with a parallel VA1 stage. The design of such hierarchical VC-based networks
was proposed in ElastiNoC (Seitanidis et al. 2014b ), and represent the first truly
distributed VC-based NoC architectures.

8.6 Take-Away Points

The allocation steps in a VC-based router are responsible for the largest part of the
router's delay. Speeding up the allocation process requires either the application of
lookahead VA1 techniques that remove VA1 completely from the critical path, or the
adoption of combined allocation that removes the need for VA2. On the contrary,
instead of removing any of the required tasks, speculative allocation manages to
parallelize the execution of VA and SA by employing more hardware modules for
switch allocation. The employment of virtual networks or input speedup can further
simplify the allocation process with the cost of additional multiplexing area.