Baseline Virtual-Channel Based Switching Modules and Routers - Microarchitecture of Network-on-Chip Routers - page 119

outVCAvailable

VA

"0...00"

0

1

candidateOutVC

en

outPort[i]

outVC[i]

RC

0

en

1

dst

outVCLock[i]

head

ready
valid

data

Fig. 7.10 The request generation and grant handling logic for the output VC allocation process.
Each input VC forwards to the VA unit the candidate output VCs and the selected output port (as
computed by the RC unit) and receives the id of the selected output VC along with a flag that
reveals if the allocation process was successful or not

the i th input VC is empty in the current cycle. This can occur since flits are not
guaranteed to arrive contiguously for a single input VC. Therefore, masking the
requests with the valid Œi bit solves this issue.
The packet has allocated an output VC: The second condition dictates that the
input VC has been assigned an output VC. This is resolved by masking the
outVCLock Œi variable with the bits of the outPort Œi bit vector (see right side
of Fig. 7.11 ). Similar to the many to one connection, a head flit is allowed to use
the VA result directly at the same cycle using selOutVC Œi instead of outVC Œi
via a bypass multiplexer.
The output VC has enough credits: An input VC can send a request to the
switch allocator if the selected output VC has at least one credit available. This
checking requires first the selection of the appropriate ready signal. Therefore,
the i th input VC checks if ready Œ outPort Œi Œ outVC Œi D 1. Thus, each input VC
should select from the N V ready bits the one that corresponds to its destined
output port and allocated output VC. This selection is done by the multiplexers
showninFig. 7.11 . In the first selection stage the ready bits that belong to the
selected output are distinguished from the rest. In the second selection stage
the ready bit that belongs to the assigned output VC is selected and it is finally
masked with the outPort Œi requests.