Target Code Generation - Crafting a Compiler - page 489

13

Target Code Generation

Ultimately, each compiler must focus its translation on the capabilities of a
particular machine architecture. In some cases, such as the Java Virtual Ma-
chine (JVM) and Microsoft Intermediate Language (MSIL), the architecture
is virtual . Virtual machines allow program execution on a wide variety of
computing platforms at the cost of an additional layer of software—the virtual
machine simulator.
More traditionally, a compiler targets its translation to a particular machine
architecture implemented in an actual physical microprocessor. Examples
include the Intel R

x86processorseriesaswellastheSparc TM ,MIPS R ,and

processors. In all cases, whether the architecture is virtual or real,
the code generator must decide how to map program code and data into a
processor's memory. Fast and flexible data access is essential. Moreover, the
capabilities of each processor should be e

PowerPC R

ff ectively exploited, allowing fast and

reliable program execution.
In this chapter we explore how intermediate forms, such as JVMbytecodes
and abstract syntax tree (AST) subtrees, are translated into executable form.
Collectively, this process is called code generation , though code generation
actually involves a number of individual tasks that must be handled.
At this point in the translation process, the compiler has produced an in-
termediate form, such as the JVM bytecodes discussed in Chapter 10. This
is accomplished by the code-generation visitors discussed in Chapters 2, 7,

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