Hardware Reference
In-Depth Information
21.6.
What is the meaning of the embedded assertion
a1
?
always
@(
posedge
clk)
begin
// ...
for
(
int
i = 0; i < 4; i++)
begin
// ...
if
(en[i])
begin
// ...
a1:
assert property
(a[i][
*
2]);
end
end
end
21.7.
Suppose that assertion
a1
in Exercise
21.6
is changed to
assert final
(a[i])
. What could be its possible implementation in FV?
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