Coverage - SVA: The Power of Assertions in SystemVerilog - page 420

18.6. Write two cover property statements that record whether between two
conditions, a and b , where b follows a by some indefinite number of clock ticks,
the condition c occurred and not occurred, respectively.
18.7. Modify the code in Fig. 18.1 to add a covergroup recording the kinds of the
transactions that are witnessed. Fold the three cover property statements into a
single cover property that collects this coverage.
18.8. The covergroup solution for Example 18.14 shown in Fig. 18.3 uses a
strategy of running N parallel threads, one for each output channel. Each thread
captures into local variables the packet start vector startIn , all bytes of dataIn
for two consecutive cycles of clkIn , and the one byte of dataOut for the channel
being tracked in the subsequent cycle of clkOut . At the next cycle of clkOut ,the
thread passes all this data, together with another byte of dataOut for its channel,
to samplePathInfo to sort out which coverage data paths ending at the tracked
channel have been witnessed.

1. Discuss the redundancy of data across the various threads running in parallel.

2. What redundancy is there, if any, in the processing of the calls to task

samplePathInfo across the parallel threads?

3. Write a new encoding that uses the same covergroup , but which only runs a

single thread for all the data channels. Make the single thread collect all the
data from dataIn for two consecutive cycles as before, and make it collect all
the bytes of dataOut in the subsequent cycle of clkOut . At the next cycle of
clkOut , pass this data, together with all the bytes of dataOut ,toacalltoanew
task that analyzes the data path coverage for all channels.

4. Discuss the savings in data capture with the new encoding and compare the

processing complexity for its single task call with the N parallel calls to
samplePathInfo in Fig. 18.3 .