Introduction - SVA: The Power of Assertions in SystemVerilog - page 21

Fig. 1.9 Transactions of assertion req_ack

In Fig. 1.9 the transactions are delayed by one clock cycle with respect to the
times at which req and ack rise. This may seem strange. For example, why does
trans1 last from time 20 until 40, and not from 10 until 30? Concurrent assertions
use sampled values of their variables, that is, the values that these variables have
at the beginning of a simulation step (Sect. 1.3 ). At the beginning of the simulation
step corresponding to time 10, the sampled value of req is still 0. Assertion req_ack
will use the new value 1 of req only at time 20. This explains the shift in transaction
marking in the figure.
Assertions may also be checked in random simulation [ 16 , 19 , 38 ] environments.
Random simulation can be achieved using testbenches that generate random stimuli
using constraints or assumptions. While random simulation can hit a large amount of
bugs rather quickly, it is difficult to achieve good coverage of corner cases. Another
drawback of random simulation is its speed—resolving imposed constraints can be
prohibitively slow.
Simulation provides the most intuitive and user-friendly environment for asser-
tion debugging. Even when assertions are not targeted for simulation, simulation
may be used for assertion debugging. It seldom happens that complex assertions
are written correctly the first time. Usually failures in new assertions are caused by
bugs in the assertions themselves, not by design errors. Before checking assertions
in other environments, such as emulation and formal verification, it is highly
recommended to debug them in simulation. We discuss assertion debugging in
Chap. 19 .

1.4.2 Checking Assertions Using Hardware Acceleration

Checking assertions in simulation is intuitive and convenient, but unfortunately,
simulation is slow compared to hardware speeds, and as a result, only very short
testing sequences may be checked this way. For example, to check a CPU model, an
operating system and several typical applications should be run on it, but it would
take months or years to simulate a few seconds of the real work.