Clocks - SVA: The Power of Assertions in SystemVerilog - page 271

12.2 Further Details of Clocks

This section delves into further details of specifying clocks, their scoping, and the
use of multiple clocks.

12.2.1 Preponed Value Sampling

In general, references to variables and nets that appear in a concurrent assertion use
sampled values , i.e., in most cases the values from the Preponed region of the time
step (see Appendix A ). The following are exceptions for this rule:

￿ Disable condition of disable iff .
￿ Clocking event expressions.
￿ Actual arguments passed to ref or const ref arguments 5 of subroutines

attached to sequences.
￿ Assertion action blocks.
References in the other contexts above always use current values unless they appear
within the system function $sampled . Since subroutines attached to sequences and
action blocks execute in the Reactive region, this means that references in the last
two contexts use Reactive region values.
If Preponed value sampling applies to a reference to a variable or net and the
reference appears within the scope of a clocking event, then the time steps in which
the reference is evaluated are those in which the clocking event occurs. References
in the abort condition of an asynchronous abort ( accept_on or reject_on )use
sampled values, but the abort condition is not governed by a clock. 6
As a simple example, consider the following:

a_strange_clk: assert property (

1

@( posedge clk)

2

clk

3

) else $error("FAIL: clk=%b", clk);

4

For simplicity, assume that clk is of type bit and that it changes value at most once
in any time step. The reference to clk within the clocking event in Line 2 uses the
current value, while the reference in Line 3 uses the sampled value. In a time step
in which posedge clk occurs, the sampled value will always be 1'b0 . Therefore,
at each such clock tick, a_strange_clk will fail and the action block in Line 4
will execute. The reference to clk after the control string in the display statement

5 ref and const ref both specify that the actual argument is passed by reference. External
changes to the actual argument are visible to the subroutine. A ref argument can also be modified
by the subroutine, while a const ref argument cannot.
6 Technically, one could say that disable conditions and asynchronous abort conditions are not
within the scope of any clock.