Assertion System Functions and Tasks - SVA: The Power of Assertions in SystemVerilog - page 131

Chapter 7
Assertion System Functions and Tasks

It's a question of whether we're going to go forward into the
future, or past to the back.

— Dan Quayle

This chapter describes system functions and tasks designed to be used in assertions.
System tasks control the execution of assertions and their action blocks. Assertion
system functions are divided into two groups:

￿ Bit vector functions
￿ Sampled value functions

7.1 Bit Vector Functions

Table 7.1 contains a list of available bit vector functions along with their description.
All bit vector functions, with the exception of $countbits , have a bit vector as their
single argument. Function $countbits requires an additional list of arguments to
specify the control values to match.
It is possible to write user functions that accomplish the same thing, however,
writing them can be rather cumbersome and certainly less efficient in simulation.
This is why the functions are included as part of the standard. The EDA tool
providers can thus implement them in an as efficient way as possible within the
tools.