Hardware Reference
In-Depth Information
Fig. 6.5 ##3 s
s
clock ticks
Solution: Let the initial point of the sequence be clock tick i . Sequence a ##1 b
has a match iff a is true in clock tick i and b is true in clock tick i C 1.Thematch
of sequence a ##1 b happens in clock tick i C 1. Therefore, for the fusion to have
a match, sequence c ##1 d should have a match starting from clock tick i C 1.
It means that c should be true in clock tick i C 1, and d should be true in clock tick
i C 2. Bringing it all together, we have that sequence (a ##1 b) ##0 (c ##1 d)
is equivalent to sequence a ##1 b && c ##1 d .
t
Example 6.14. Write a sequence describing two back-to-back transactions. The
transactions are represented with sequences trans1 and trans2 .
Solution: Consider two interpretations:
￿ trans2 starts in the clock tick when trans1 finishes.
￿ trans2 starts in the clock tick next to the endpoint of trans1 .
The first scenario may be expressed as trans1 ##0 trans2 , while the second
scenario may be expressed as trans1 ##1 trans2 .
t
We will provide more examples of sequence fusion in the following sections.
6.3.4
Initial Delay
We will start this section with a motivational example:
Example 6.15. Skip n>0cycles before matching sequence s .
Solution: 1 ##n s . Recall that value 1 means true, matching anything at the initial
clock tick of the resulting sequence.
t
The situation described in Example 6.15 is typical, and for convenience there is
a special syntax to specify the number of clock ticks to be skipped before beginning
a sequence match (Fig. 6.5 ), i.e., to specify initial sequence delay : ##n s . The delay
is the number of clock ticks and must be a nonnegative elaboration time integral
constant. Our definition works for nonzero n . The case of n D 0 is considered in
Sect. 6.9 .
Efficiency Tip. Large initial delays are inefficient in FV, and may also negatively
affect simulation performance. See Sect. 19.3 for details.
Example 6.16.
The value of a should be always true starting from clock tick 2.
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