Database Reference
In-Depth Information
The Secret Sauce: FPGA-Assisted Analytics
The FPGA is a critical enabler of the price-performance advantages of the
Netezza appliance. An FPGA is a semiconductor chip equipped with a large
number of internal gates that can be programmed to implement almost all
logical functions. After an FPGA is programmed, it operates more like special-
built hardware than a general-purpose processor giving it optimum perfor-
mance for narrowly defined tasks. FPGAs are particularly effective at man-
aging special purpose stream processing tasks, and are extensively used in
such applications as digital signal processing, medical imaging, and speech
recognition. In fact, it's likely the case that you've got an FPGA in your house
and didn't even know it! Do you watch DVDs or Blu-ray discs? An FPGA is
likely behind the scenes, facilitating reads of high-quality compressed digital
data off the spinning disc without the jitters. An FPGA is tiny in size (about
1
"
× 1
"
of square silicon) but performs programmed tasks with enormous
efficiency, drawing little power and generating little heat.
Figure 4-3 illustrates FPGA-enabled processing within each S-blade. A
dedicated high-speed interconnect from the storage array enables data to be
delivered to memory as quickly as it can stream off the disk. Compressed
data is cached in memory using a smart algorithm, which ensures that the
most commonly accessed data is served right out of memory instead of re-
quiring disk access.
Each FPGA contains embedded engines that perform filtering and
transformation functions on the data stream. These engines are dynami-
cally reconfigurable (enabling them to be modified or extended through
software), are customized for
every snippet
through instructions provided
during query execution, and act on the data stream at extremely high speeds.
All of the engines that you see in the FPGA box in Figure 4-3 run in parallel
and deliver the net effect of decompressing and filtering out 95 to 98 percent
of table data at physics speed, thereby only keeping the data that's relevant
Compress
Memory
CPU
NIC
D
M
A
Project and Restrict
Visibility
FPGA
Figure 4-3
FPGA-assisted snippet processing in Netezza
