Digital Signal Processing Reference
In-Depth Information
Stopband attenuation ¼ 0.005 (absolute)
Final sampling rate ¼ 1,000 Hz
a. Draw the decimation block diagram.
b. Specify the sampling rate for each stage.
c. Determine the window type, filter length, and cutoff frequency for the first stage if the
window method is used for anti-aliasing FIR filter design ( H 1 ðzÞ ).
d. Determine the window type, filter length, and cutoff frequency for the second stage if the
window method is used for the anti-aliasing FIR filter design ( H 2 ðzÞ ).
12.7. Consider the sampling conversion from 6 kHz to 8 kHz with the following specifications:
Original sampling rate ¼ 6 kHz
Interpolation factor L ¼ 4
Decimation factor M ¼ 3
Frequency of interest ¼ 0 e 2,400 Hz
Passband ripple ¼ 0.02 dB
Stopband attenuation ¼ 46 dB
a. Draw the block diagram for the processor.
b. Determine the window type, filter length, and cutoff frequency if the window method is
used for the combined FIR filter HðzÞ .
12.8. Consider the design of a two-stage decimator with the following specifications:
Original sampling rate ¼ 320 kHz
Frequency of interest ¼ 0 3,400 Hz
Passband ripple ¼ 0.05 (absolute)
Stopband attenuation ¼ 0.005 (absolute)
Final sampling rate ¼ 8,000 Hz
a. Draw the decimation block diagram.
b. Specify the sampling rate for each stage.
c. Determine the window type, filter length, and cutoff frequency for the first stage if the
window method is used for anti-aliasing FIR filter design ( H 1 ðzÞ ).
d. Determine the window type, filter length, and cutoff frequency for the second stage if the
window method is used for anti-aliasing FIR filter design ( H 2 ðzÞ ).
12.9. a. Given an interpolator filter
H z ¼ 0 : 25 þ 0 : 4 z 1
þ 0 : 5 z 2
draw the block diagram for interpolation polyphase filter implementation for
the case of L ¼ 2.
b. Given a decimation filter
¼ 0 : 25 þ 0 : 4 z 1
þ 0 : 5 z 2
þ 0 : 6 z 3
H
z
draw the block diagram for decimation polyphase filter implementation for the case of M ¼ 2.
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