Multirate Digital Signal Processing, Oversampling of Analog-to-Digital Conversion, and Undersampling of Bandpass Signals - Digital Signal Processing: Fundamentals and Applications - page 592

12.3.2 Sigma-Delta Modulation Analog-to-Digital Conversion
To further improve ADC resolution, sigma-delta modulation (SDM) ADC is used. The principles of
the first-order SDM are described in Figure 12.28 .
First, the analog signal is sampled to obtain the discrete-time signal xðnÞ . This discrete-time signal
is subtracted by the analog output from the m -bit DAC, converting the m -bit oversampled digital signal
yðnÞ . Then the difference is sent to the discrete-time analog integrator, which is implemented by the
switched-capacitor technique, for example. The output from the discrete-time analog integrator is
converted using an m -bit ADC to produce the oversampled digital signal. Finally, the decimation filter
removes outband quantization noise. Further decimation processes can change the oversampling rate
back to the desired sampling rate for the output digital signal w ( m ).
To examine the SDM, we need to develop a DSP model for the discrete-time analog filter described
in Figure 12.29 .
As shown in Figure 12.29 , the input signal cðnÞ designates the amplitude at time instant n , while the
output dðnÞ is the area under the curve at time instant n , which can be expressed as a sum of the area
under the curve at time instant n 1 and an area increment:

dðnÞ¼dðn 1 Þþ area incremetal

Using the extrapolation method, we have

dðnÞ¼dðn 1 Þþ 1 cðnÞ (12.23)

Applying the z-transform to Equation (12.23) leads to a transfer function of the discrete-time analog
filter as

H z ¼ DðzÞ

1
1 z 1

CðzÞ ¼

(12.24)

Again, considering that the m -bit quantization requires one sample delay, we get the DSP model for the
first-order SDM depicted in Figure 12.30 , where yðnÞ is the oversampling data encoded by m bits each,
and eðnÞ represents quantization error.
The SDM DSP model represents a feedback control system. Appling the z-transform leads to
Y z ¼

1 z 1 X z z 1

Y z þ E z

1

(12.25)

y () w ()

x ()

x ()

Discrete-time
analog
integrator

m-bit
ADC

S/H Decimator

Anti-aliasing LPF

Analog
signal

M

m-bit
DAC

FIGURE 12.28
Block diagram of SDM ADC.