Digital Signal Processing Reference
In-Depth Information
11.6.
For the m -law compression and expanding process shown in Figure 11.3 with m ¼ 255,
a 3-bit midtread quantizer described in Figure 11.1 , and an analog signal range from 4to
4 volts, determine the binary codes, recovered voltages, and quantization errors when each
input is 2.6 volts and 0.1 volt.
For the m -law compression and expanding process shown in Figure 11.3 with m ¼ 255,
a 3-bit midtread quantizer described in Figure 11.1 , and an analog signal range from 5to
5 volts, determine the binary codes, recovered voltages, and quantization errors when each
input is 2.6 volts and 3.5 volts.
11.7.
11.8.
For the m -law compression and expanding process shown in Figure 11.3 with m ¼ 255, a
3-bit midtread quantizer described in Figure 11.1 , and an analog signal range from 10 to
10 volts, determine the binary codes, recovered voltages, and quantization errors when each
input is 5, 0, and 7.2 volts.
11.9.
In a digital companding system, encode each of the following 12-bit linear PCM codes into
8-bit compressed PCM code:
a. 000000010101
b. 101011101010
11.10.
In a digital companding system, decode each of the following 8-bit compressed PCM codes
into 12-bit linear PCM code:
a. 00000111
b. 11101001
11.11.
In a digital companding system, encode each of the following 12-linear PCM codes into the
8-bit compressed PCM code:
a. 001010101010
b. 100000001101
11.12. In a digital companding system, decode each of the following 8-bit compressed PCM codes
into the 12-bit linear PCM code:
a. 00101101
b. 10000101
11.13. Consider a 3-bit DPCM encoding system with the following specifications ( Figure 11.19 ):
Encoder scheme : xðnÞ¼xðn 1 Þð predictor Þ
dðnÞ¼xðnÞxðnÞ
d q n ¼ Q½dðnÞ ¼ quantizer in Table 11 : 9
x n ¼ x n þ d q n
5-bit input data: 0 Þ¼ 6, 1 Þ¼ 8,
and
2 Þ¼ 13
Perform DPCM encoding to produce the binary code for each input data.
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