Digital Signal Processing Reference
In-Depth Information
(a)
(b)
FIGURE 6.23
(a) Direct-form II realization; (b) direct-form II realization with M ¼ 2.
and
yðnÞ¼b
0
wðnÞþb
1
wðn
1
Þþ.þ b
M
wðn MÞ
(6.34)
Realization of Equations
(6.33) and (6.34)
produces another direct-form II realization, which is
demonstrated in
Figure 6.23
(a). Again, the corresponding realization of the second-order IIR filter is
described in
Figure 6.23
(b). Note that in
Figure 6.23
(
a), the variables
wðnÞ
,
wðn
1
Þ
,
wðn
2
Þ
,
.
,
wðn MÞ
are different from the filter inputs
xðn
1
Þ
,
xðn
2
Þ
,
.
,
xðn MÞ
.
6.6.3
Cascade (Series) Realization
An alternate way to filter realization is to cascade the factorized
HðzÞ
in the following form:
HðzÞ¼H
1
ðzÞ$H
2
ðzÞ/H
k
ðzÞ
(6.35)
where
H
k
ðzÞ
is chosen to be the first- or second-order transfer function (section), which is defined by
H
k
ðzÞ¼
b
k
0
þ b
k
1
z
1
(6.36)
1
þ a
k
1
z
1
or
H
k
ðzÞ¼
b
k
0
þ b
k
1
z
1
þ b
k
2
z
2
(6.37)
1
þ a
k
1
z
1
þ a
k
2
z
2
respectively. The block diagram of the cascade, or series, realization is depicted in
Figure 6.24
.
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