Hardware Reference
In-Depth Information
4-bit SD Mode
This is the mode used when the data bus width is more than a single bit and supported by
SDHC and SDXC cards. Higher data clock rates also improve transfer rates. Table 8-5 lists
the pin assignments.
Table 8-5. 4-bit SD Mode
Pin
Name
I/O
Logic
Description
1
DAT3
I/O
PP
Data 3
2
CMD
I/O
PP/OD
Command/response
3
VSS
S
S
Ground
4
VDD
S
S
Power
5
CLK
I
PP
Clock
6
VSS
S
S
Ground
7
DAT0
I/O
PP
Data 0
8
DAT1
I/O
PP
Data 1
nIRQ
O
OD
SDIO cards share with interrupt
9
DAT2
I/O
PP
Data 2
Wear Leveling
Unfortunately, Flash memory is subject to wear for each write operation performed
(as each write requires erasing and programming a block of data). The design of Flash
memory requires that a large block of memory be erased and rewritten, even if a single
sector has changed value. For this reason, wear leveling is used as a technique to extend
the life of the media. Wear leveling extends life by moving data to different physical blocks
while retaining the same logical address.
Note
ScanDisk calls the block of Flash memory being erased and rewritten a zone .
Some cards use wear leveling. 18 Indeed the SanDisk company indicates that their
products do use wear leveling. 20 However, the type of wear leveling supported by SanDisk
is limited to zones within the media. Each SanDisk zone has 3% extra capacity, from
which writes can be wear leveled within. If the zone size is 4 MB and is overprovisioned
by 3%, this leaves about 245 spare sectors within each zone. Thus each 4 MB zone holds
8,192 active sectors at any given instant, rotated among 245 spares.
 
 
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