Hardware Reference
In-Depth Information
Protocol
This section presents a simplistic introduction to the 1-Wire communication protocol.
Knowing something about how the signaling works is not only interesting, but may be
helpful for troubleshooting. More information is available on the Internet.
38
Reset
Figure
11-2
provides a simplified timing diagram of the reset procedure for the 1-Wire
protocol. When the master driver begins, it must reset the 1-Wire bus to put all the slave
devices into a known state.
Figure 11-2.
1-Wire reset protocol
For reset, the bus is brought low and held there for approximately 480 msec. Then
the bus is released, and the pull-up resistor brings it high again. After a short time, slave
devices connected to the bus start responding by bringing the line low and holding it for
a time. Several slaves can participate in this at the same time. The master samples the bus
at around 70 msec after it releases the bus. If it finds the line low, it knows that there is at
least one slave connected and responding.
Soon after the master sampling point, all slaves release the bus again and go into a
listening state. They do not respond again until the master specifically addresses a slave
device. For simplicity, we'll omit the discovery protocol used.
■
Note
each slave has a guaranteed unique address.
Data I/O
The data protocol is shown in Figure
11-3
. Whether writing a 0 or 1 bit, the sending device
brings the bus line low. This announces the start of a data bit.
