The PC - PC Based Instrumentation and Control - page 39

more elaborate error detection than simple parity checking. Note that ECC can
detect multiple-bit errors and can locate and correct single-bit errors.
Memory terminology
The following terminology is commonly used to describe the various types of
memory present within a PC or PC-compatible system.
Buffered memory
A buffered memory module contains buffers that are used to interface the mod-
ule to the external memory bus. So that more memory devices can be included
in the module itself, the built-in buffers provide additional drive capability and
also regularize the logic levels employed. It is important to note that buffered
and un-buffered memory cannot be mixed. See also Registered memory.
BEDO RAM
BEDO (burst extended data output) RAM can process four memory addresses
in one burst. BEDO bus speeds range from 50 to 66 MHz compared with up to
33 MHz for EDO RAM and 25 MHz for FPM RAM.
Cache memory
Cache memory comprises a limited amount (often 256 or 512 KB) of high-
speed read/write memory in close physical and electrical proximity to the CPU.
Instead of having to fetch instructions and data from the relatively slow main
system board RAM, the cache memory provides the CPU with rapid access to
the most recent and frequently requested instructions. The primary cache or
level 1 cache is the cache memory closest to the processor core. Secondary
cache ( level 2 cache ) may also be provided. This cache is normally fitted to the
system board.
CMOS memory
See page 44.
Double data rate (DDR) memory
The latest generation of synchronous dynamic random access memory
(SDRAM) operates at double the data rate (DDR). With DDR SDRAM, data is
read on both the rising and the falling edge of the PC clock, thereby delivering
twice the bandwidth of standard SDRAM. With DDR SDRAM, memory speed
doubles without increasing the clock frequency.
Dual-inline memory module (DIMM)
Dual-inline memory modules (DIMM) are similar to single inline memory mod-
ules but the contacts on each side of the DIMM are differently connected (unlike