Hardware Reference
In-Depth Information
Table 1.11
8288 Bus Controller status inputs
Processor status line
S2
S1
S0
Condition
0
0
0
Interrupt acknowledge
0
0
1
I/O read
0
1
0
I/O write
0
1
1
Halt
1
0
0
Memory read
1
0
1
Memory read
1
1
0
Memory write
1
1
1
Inactive
Chipsets
In modern PCs, the overall device count has been significantly reduced by
integrating several of the functions associated with the original PC chipset
within one or two VLSI devices or within the CPU itself.
Early examples of integrated chipsets include the Chips and Technology
82C100 XT Controller found in older 'XT-compatible systems', provides the
functionality associated with no less than six of the original XT chipset and
effectively replaces the following devices: one 8237 DMA Controller, one 8253
Counter/ Timer, one 8255 Parallel Interface, one 8259 Interrupt Controller,
one 8284 Clock Generator, and one 8288 Bus Controller. In order to ensure
software compatibility with the original PC, the 82C100 contains a superset of
the registers associated with each of the devices which it is designed to replace.
The use of the chip is thus completely transparent as far as applications software
is concerned.
Another example is OPTi's 82C206 and 82C495XLC 'AT controller' chipset
found in many early '486 and Pentium-based systems. The 82C206 provides
the functions of two 82437 DMA Controllers, two 8259 Interrupt Con-
trollers, one 8254 Counter/Timer, one 146818-compatible Real-Time Clock,
and one 74LS612 Memory Mapper. In addition, the chip provides 114 bytes of
CMOS RAM (used for storing the BIOS configuration settings). The matching
82C495XLC device provides cache memory control and shadow RAM sup-
port for system, video, and adapter card BIOS. The chip also contains on-chip
hardware that provides direct support for up to two VL-bus master devices.
Modern PCs use chipsets supplied by a number of different manufacturers.
The chipsets provide an interface between the processor, memory and graphics
controllers (which must all operate at this highest possible speed), and the
various expansion buses (PCI, ISA, etc.). One of the functions of the chipset is
to act as a
bridge
between the various bus systems, managing the data flow and
ensuring the efficient transfer of data Table 1.12. Figure 1.15 shows the typical
architecture of a system that supports both PCI and ISA expansion bus systems.
The
front side bus
(FSB) allows data to be transferred at high speed between
the processor, memory controller, and graphics controller whilst the
back side
bus
(BSB) allows the processor to be fed with an instruction stream from the
level 2
cache memory
(see page 39).
