Hardware Reference
In-Depth Information
enough information from the Task State Segment to issue another fault
pointing to the actual problem.
10
11 (0Bh): Not Present fault
The Not Present interrupt allows the operating system to implement virtual
memory through the segmentation mechanism. When a segment is marked
as 'not present', the segment is swapped out to disk. The interrupt 0B fault
is triggered when an application needs access to the segment.
11
12 (0Ch): Stack fault
Stack fault occurs with error code 0 if an instruction refers to memory
beyond the limit of the stack segment. If the operating system supports
expand-down segments, increasing the size of the stack should alleviate this
problem. Loading the Stack Segment with invalid descriptors will result in
a general protection fault.
12
13 (0Dh): General protection fault
Any condition that is not covered by any of the other processor exceptions
will result in a general protection fault. The exception indicates that this
program has been corrupted in memory,
usually resulting in immediate
termination of the program.
13
14 (0Eh): Page fault
The Page fault interrupt allows the operating system to implement virtual
memory on a demand-paged basis. An interrupt 14 usually is issued when
an access to a page directory entry or page table with the present bit set
to 0 (not present) occurs. The operating system makes the page present
(usually retrieves the page from virtual memory) and re-issues the faulting
instruction, which then can access the segment. A page fault also occurs
when a paging protection rule is violated (when the retrieve fails, or data
retrieved is invalid, or the code that issued the fault broke the protection rule
for the processor). In these cases the operating system takes over for the
appropriate action.
14
16 (10h): Coprocessor Error fault
This interrupt occurs when an unmasked floating-point exception has sig-
nalled a previous instruction. (Because the 80386 does not have access to the
floating point unit, it checks the ERROR pin to test for this condition.) This
is also triggered by a WAIT instruction if the Emulate math coprocessor bit
at CR0 is set.
15
17 (11h): Alignment Check fault
This interrupt is only used on the 80486 CPUs. An interrupt 17 is issued
when code executing at ring privilege 3 attempts to access a word operand
that is not on an even-address boundary, a double-word operand that is not
divisible by four, or a long real or temp real whose address is not divisible
by eight. Alignment checking is disabled when the CPU is first powered up
and is only enabled in protected mode.
Because there are many conditions that can cause a fatal exception error,
the first step in resolving the issue is to narrow the focus by using the
clean boot procedure described earlier. It is also worth noting that many
problems occur because of conflicting drivers, terminate-and-stay-resident pro-
grams (TSRs),
and other settings that are loaded when the computer first
starts.
