Hardware Reference
In-Depth Information
It is important to appreciate that, whilst Windows does not actually
cause these errors, it has the exception-handling routine for that particu-
lar processor exception and this, in turn, is what actually displays the error
message.
For those with some experience of low-level architecture, the various fatal
exception error codes (in hexadecimal) are listed below:
1
00: Divide fault
The processor returns this exception when it encounters a divide fault. A
divide fault occurs if division by zero is attempted or if the result of the
operation does not fit in the destination operand.
2
02: NMI Interrupt
Interrupt 2 is reserved for the hardware non-maskable-interrupt condition.
No exceptions trap via interrupt 2.
3
04: Overflow trap
The overflow trap occurs after an INTO instruction has executed and the 0F
bit is set to 1.
4
05: Bounds check fault
The BOUND instruction compares the array index with an upper and lower
bound. If the index is out of range, then the processor traps to interrupt 05.
5
06: Invalid Opcode fault
This error is returned if any one of the following conditions exists:
•
The processor tries to decode a bit pattern that does not correspond to any
legal computer instruction.
•
The processor attempts to execute an instruction that contains invalid
operands.
•
The processor attempts to execute a protected-mode instruction while
running in virtual 8086 mode.
•
The processor tries to execute a LOCK prefix with an instruction that
cannot be locked.
6
07: Coprocessor not available fault
This error occurs if the computer does not have a math coprocessor and
the EM bit of register CR0 is set indicating that Numeric Data Processor
emulation is being used. Each time a floating point operation is executed, an
interrupt 07 occurs.
This error also occurs when a math coprocessor is used and a task switch
is executed. Interrupt 07 tells the processor that the current state of the
coprocessor needs to be saved so that it can be used by another task.
7
08: Double fault
Processing an exception sometimes triggers a second exception. In the
event that this occurs, the processor will issue a interrupt 08 for a double
fault.
8
09: Coprocessor Segment overrun
This error occurs when a floating point instruction causes a memory access
that runs beyond the end of the segment. If the starting address of the floating
point operand is outside the segment, then a General Protection Fault occurs
(interrupt 0D).
9
10 (0Ah): Invalid Task State Segment fault
Because the Task State Segment contains a number of descriptors, any num-
ber of conditions can cause exception 0A. Typically, the processor can gather
