Hardware Reference
In-Depth Information
operations on large, 'floating point' numbers. A floating point number com-
prises three parts: the
sign
which may be positive or negative, the significant
digits (or
mantissa
), and an
exponent
(which effectively fixes the position of the
decimal point within the number). Hence, floating point numbers are essentially
numbers in which the decimal point 'floats' rather than occupies a fixed pos-
ition. The manipulation of floating point numbers is exclusively the province of
the maths coprocessor - the ALU of a normal CPU is not equipped to operate
with such numbers.
The 8087 was the original maths coprocessor which was designed to be active
when mathematics related instructions were encountered in the instruction
stream of an 8086 or 8088 CPU. The 8087, which is effectively wired in parallel
with the 8086 or 8088 CPU, adds eight 80-bit floating point registers to the CPU
register set. The 8087 maintains its own instruction queue and executes only
those instructions which are specifically intended for it. The 8087 is supplied in
a 40-pin DIL package, the pin connections for which are shown in Figure 1.12.
The active low TEST input of the 8086/8088 CPU is driven from the BUSY
output of the 8087 NDP. This allows the CPU to respond to the WAIT instruction
(inserted by the assembler/compiler) which occurs before each coprocessor
instruction. An FWAIT instruction follows each coprocessor instruction which
deposits data in memory for immediate use by the CPU. The instruction is then
translated to the requisite 8087 operation (with the preceding WAIT) and the
FWAIT instruction is translated as a CPU WAIT instruction.
During coprocessor execution, the BUSY line is taken high and the CPU
(responding to the WAIT instruction) halts its activity until the line goes low. The
two Queue Status (QS0 and QS1) signals are used to synchronize the instruction
queues of the two processing devices. 80287 and 80387 chips provide maths
co-processing facilities within AT and '386-based PC's, respectively. In '486DX
(and later systems) there is no need for a maths coprocessor as these facilities
have been incorporated within the CPU itself.
The 80287 and 80387 Maths Coprocessors operate in conjunction with 80286
and 80386 CPU, respectively. The '287 coprocessor was introduced in 1985
whilst the '387 made its debut in 1987. Each device represented a signifi-
cant upgrade on its predecessor - the most notable factor being an increase in
speed from 5 MHz (the original 8087) to 33 MHz (the fastest version of the
80387).
With the advent of the 80486, Intel placed the floating point unit
inside
the
CPU (the floating point units was actually based on the 33 MHz version of the
80387). Since not all applications demand the power of a maths coprocessor,
Intel developed a 'cut down' version of the '486 CPU
without
the internal
floating point unit. This processor was designated the '486SX (to upgrade a
system based on such a device so that it can take advantage of maths coprocessor
instructions it is merely necessary to add a '487 coprocessor). The logic behind
Intel's approach was apparent that users could later upgrade their systems if they
found that the addition of a maths coprocessor was necessary for the software
that they intended to run.
This approach could hardly be described as cost effective since the falling
cost of CPUs meant that a full '486DX soon cost less than the two chips it
could replace (i.e. a '486SX plus a '487SX). Happily, all modern processors
incorporate internal floating point units and there is thus no further need for
separate coprocessors.
