Information Technology Reference
In-Depth Information
2.2
DDP Hardware Implementations
Each one of the illustrated CP boxes has been implemented in both FPGA and ASIC
devices. The implementations have been done using VHDL hardware description
language with the structural architectures, illustrated in the above figures. For the
FPGA implementations the Xilinx device 2V40cs144 was used [9]. For the ASIC
approach a 0.33 um library was selected.
In the next Tables I and II, the implementations synthesis results are illustrated for
both FPGA and ASIC approaches. The VLSI integrations are examined in the terms
of covered area and operating frequency. Especially for the ASIC device both number
of equivalent gates and measurements by using sqmil are given. This was done in
order to have a detailed study of the allocated resources. The covered area measured
in sqmil is depended on the used technology each time, 0.33 um in our case. The
number of gates of course is independent to technology, but do not provide measure-
ments to be considered efficiently in all of the cases and especially for comparison
reasons.
Table 1.
FPGA Synthesis Results
Encryption
Algorithms
CIKS-1 Cipher
SPECTR-H64 Cipher
Covered Area
Covered Area
F
(GHz)
F
(GHz)
Components
FGs
CLBs
DF/Fs
FGs
CLBs
DF/Fs
I) P
2/1
2
1
-
2.10
2
1
-
2.10
II) P
4/4
8
4
-
1.06
8
4
-
1.06
III) P
8/12
24
12
-
0.70
24
12
-
0.70
IV) P
16/32
64
32
-
0.52
-
-
-
-
V) P
32/48
96
48
-
0.70
-
-
-
-
VI) P
32/80
224
112
-
0.84
224
112
-
0.84
From the synthesis results for both FPGA and ASIC, it is proven that the CP boxes
are very cheap designs for hardware implementations. Their architecture is based on
simplicity. In addition to the offered high security level, the needed area resources are
minimized. The operating frequency reaches very high values. Especially all CP
boxes frequency is closed to 1 GHz. It has to be noted, that every CP box needs ex-
actly the same covered area resources and has the same operating frequency with its
inverse box. In SPECTR-H64 and CIKS-1 the CP boxes are formally different, since
they have different distribution of the controlling bits, both types of the CP boxes
being equivalent in certain sense and are implemented with the same cost though.
