Image Processing Reference
In-Depth Information
Electronic control unit
Bus voltage
VBAT
8
...
18 V
Recessive
logic “1”
Master: 1 kΩ
Slave: 30 kΩ
60%
Controlled slope
Rx
Tx
Bus
SCI/UART
or SLIC
40%
Dominant
logic “0”
GND
Time
Master: 2.2 nF
Slave: 220 pF
FIGURE .
LIN logical level definitions.
Note
:heLINspeciicationreferstoVBATattheECUconnector.
an electrical voltage close to ground and representing a logical “,” and the recessive value, with an
electricalvoltageclosetothebatterysupplyandrepresentingalogical“”(Figure.).
The bus is terminated by a pull-up resistor with a value of kΩ in the master node and kΩ
in a slave node. A diode in series with the resistor is required to prevent the electronic control unit
(ECU)frombeingpoweredbythebusincaseofalocallossofbattery.heterminationcapacitanceis
typically
C
Slave
pFintheslavenodes,whilethecapacitanceofthemasternodeishigherinorder
to make the total line capacitance less dependent from the actual number of slave nodes in a particular
network. The maximum signalling rate is limited to kbps. This value is a practical compromise
between the conflicting requirements of high slew rates for the purpose of easy synchronization, and
for slower slew rates for electromagnetic compatibility. The minimum band rate is kbps—helping
to avoid conflicts with the practical implementation of time-out periods.
=
17.6 LIN Protocol
The entities that are transferred on the LIN bus are frames. One message frame is formed by the
header and the response (data) part. The communication in a LIN network is always initiated by
the master task sending out a message header, which comprises the synchronization break, the syn-
chronisation byte, and the message identifier. One slave task is activated upon reception and filtering
of the identifier and starts the transmission of the message response. he response comprises one to
eight data bytes and is protected by one checksum byte.
The time it takes to send a frame is the sum of the time to send each byte, plus the response space,
and the interbyte spaces. he interbyte space is the period between the end of the stop bit of a byte
and the start bit of the following byte.
The interframe space is the time from the end of a frame, until start of the next frame. A frame
is constructed of a break followed by four to eleven byte-fields. The structure of a frame is shown in
Figure ..
In order to allow the detection of signaling errors the sender, of a message—as well as all receivers—
are required to monitor the transmission. After transmission of a byte, the subsequent byte may only
be transmitted if the received byte was correct. This allows a proper handling of bus collisions and
time outs.
