Image Processing Reference
In-Depth Information
14.5.3.3 Fault Isolation Mechanisms
To tolerate the failure of a single channel bus, channel redundancy has been proposed for
TTCAN [MFH + ]. This solution uses gateway nodes, which are connected to multiple channel
busses, to synchronize the global time of the different busses and maintain a consistent schedule.
However, no analysis of the dependencies between the redundant busses has been formed. For exam-
ple, due to the absence of bus guardians, a babbling idiot failure [Tem] of a gateway node has the
potential to disrupt communication across multiple redundant busses.
14.5.3.4 Diagnostic Services
he TTCAN, protocol, which forms the basis for TTCAN, has built-in error detection mechanisms such
as CRC codes to detect faults on the communication channel or error counters.
In addition, the a priori knowledge of the time-triggered send and receive instants can be used to
establish a membership service. Although such a service is not mandatory in TTCAN, Ref. [BKAS]
describes the design and implementation of a membership service on top of TTCAN.
14.5.3.5 Commercial or Prototypical Components
TTCAN controllers are available both as IP cores and as part of microcontrollers. For example, the
TTCAN IP Module is available from Bosch [Bos]. his IP module is described in very high speed
integrated circuit hardware description language (VHDL) and can be integrated as a stand-alone
device or as part of an application specific integrated circuit (ASIC). he IP module realizes a state
machine for the ISO - time-triggered communication. The state machine uses the reference
messages of the CAN bus as a synchronizing event to establish a global time base and perform
message transmissions according to the a priori known communication schedule.
AnotherIPmodulesupportingTTCANistheMultiCANIPofInineonTechnologies[Kel],
which is deployed in several Infineon devices (e.g., TC [Inf]). Like the TTCAN IP Module,
the MultiCAN IP performs clock synchronization and offers a scheduler to trigger the predefined
message transmissions.
In addition, microcontrollers are available that support the implementation of TTCAN. For
example, Atmel provides microcontrollers (e.g., TCCC, TCCC [Atma,Atmb]) that
permit the implementation of TTCAN using higher software layers. In particular, these microcon-
trollers offer a single shot transmission mode to prevent automatic retransmission upon errors. his
transmission mode is required for the implementation of TTCAN.
14.5.4 TT Ethernet
Time-triggered Ethernet [KAGS] is a protocol that unifies real-time and non-real-time traffic into
a single coherent communication architecture. Time-triggered Ethernet introduces time-triggered
messages with temporal guarantees, while also supporting event-triggered standard Ethernet com-
munication to ensure compatibility to standard Ethernet commercial of-the-shelf components.
14.5.4.1 Clock Synchronization
TT Ethernet is based on a uniform -bit binary time-format that is based on the physical second.
Fractions of a second are represented as  negative powers of two (down to about  ns), and full
seconds are presented in  positive powers of two (up to about , years). his time format has
been standardized by the object management group (OMG) in the smart transducer interface stan-
dard [EHK + ]. he time format of TT Ethernet is closely related to the time-format of the General
 
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