Image Processing Reference
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not have to be synchronized. Also, the precision of the time does not need to be high, because the
users may only need milliseconds precision to satisfy their needs.
As these design challenges are important for guiding the development of a time synchronization
protocol,theinluencingfactorsthatafectthequalityofthesynchronizedclockshavetobedis-
cussed. Although the influencing factors are similar to existing distributed computer system, they
are at different extreme levels. hese influencing factors are discussed in Section ..
5.3 Factors Influencing Time Synchronization
Regardless of the design challenges that a time synchronization protocol wants to address, the pro-
tocol still needs to address the inherent problems of time synchronization. In addition, small and
low-end sensor nodes may exhibit device behaviors that may be much worse than large systems such
as personal computers (PCs). As a result, time synchronization with these nodes present a different
set of problems. Some of the factors influencing time synchronization in large systems also apply to
sensor networks []; they are temperature, phase noise, frequency noise, asymmetric delays, and
clock glitches.
Temperature : Since sensor nodes are deployed in various places, the temperature variation
throughout the day may cause the clock to speed up or slow down. For a typical PC,
the clock drifts few parts per million during the day []. For low-end sensor nodes, the
drifting may be even worse.
Phase noise : Some of the causes of phase noise are due to access fluctuation at the hard-
ware interface, response variation of the operating system to interrupts, and jitter in the
network delay. he jitter in the network delay may be due to medium access and queueing
delays.
Frequency noise : The frequency noise is due to the unstability of the clock crystal [].
A low-end crystal may experience large frequency fluctuation, because the frequency
spectrum of the crystal has large sidebands on adjacent frequencies. The ρ values for
quartz oscillators are between 
[].
Asymmetric delay : Since sensor nodes communicate with each other through the wireless
medium, the delay of the path from one node to another may be different than the return
path.Asaresult,anasymmetricdelaymaycauseanofsettotheclockthatcannotbe
detected by a variance type method []. If the asymmetric delay is static, the time offset
between any two nodes is also static. The asymmetric delay is bounded by one-half the
round-trip time between the two nodes [].
Clock glitches : Clock glitches are sudden jumps in time. his may be caused by hardware
or software anomalies such as frequency and time steps.
and 
Since sensor nodes are randomly deployed and their broadcast ranges are small, the influencing
factors may shape the design of the time synchronization protocol. In addition, the links between
the sensor nodes may not be reliable. As a result, the influencing factors may have to be addressed
differently. In the following section, the basics of time synchronization for sensor networks are
discussed.
5.4 Basics of Time Synchronization
As the factors described in Section . influence the error budget of the synchronized clocks, the pur-
pose of a time synchronization protocol is to minimize the effects of these factors. Before developing
a solution to address these factors, some basics of time synchronization for sensor networks need
 
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