Review of Memory Hierarchy - Computer Architecture: A Quantitative Approach - page 614

Virtual page index Physical page # Present

0 3 Y

1 7 N

2 6 N

3 5 Y

4 14 Y

5 30 Y

6 26 Y

7 11 Y

8 13 N

9 18 N

10 10 Y

11 56 Y

12 110 Y

13 33 Y

14 12 N

15 25 Y

Virtual page accessed TLB(hit or miss) Page table (hit or fault)

1
5

9

14
10

6
15

12

7
2

B.13 [15/15/15/15/] <B.4> Some memory systems handle TLB misses in software (as an excep-
tion), while others use hardware for TLB misses.
a. [15] <B.4> What are the trade-offs between these two methods for handling TLB
misses?
b. [15] <B.4> Will TLB miss handling in software always be slower than TLB miss hand-
ling in hardware? Explain.