Hardware Reference
In-Depth Information
Although this is a simple example, the major difference between this drawing and a real
cache is replication. First, there is only one L1 cache. When there are two L1 caches, the top half
of the diagram is duplicated. Note that this would lead to two TLBs, which is typical. Hence,
one cache and TLB is for instructions, driven from the PC, and one cache and TLB is for data,
driven from the effective address.
The second simplification is that all the caches and TLBs are direct mapped. If any were n
-way set associative, then we would replicate each set of tag memory, comparators, and data
memory n times and connect data memories with an n :1 multiplexor to select a hit. Of course,if
if the total cache size remained the same, the cache index would also shrink by log2 n bits ac-
cording to the formula in Figure B.7 on page B-22.
B.5 Protection and Examples of Virtual Memory
The invention of multiprogramming, where a computer would be shared by several programs
running concurrently, led to new demands for protection and sharing among programs. These
demands are closely tied to virtual memory in computers today, and so we cover the topic
here along with two examples of virtual memory.
Multiprogramming leads to the concept of a process . Metaphorically, a process is a pro-
gram's breathing air and living space—that is, a running program plus any state needed to
continue running it. Time-sharing is a variation of multiprogramming that shares the pro-
cessor and memory with several interactive users at the same time, giving the illusion that all
users have their own computers. Thus, at any instant it must be possible to switch from one
process to another. This exchange is called a process switch or context switch .
A process must operate correctly whether it executes continuously from start to finish, or
it is interrupted repeatedly and switched with other processes. The responsibility for main-
taining correct process behavior is shared by designers of the computer and the operating sys-
time. The computer designer must ensure that the processor portion of the process state can
be saved and restored. The operating system designer must guarantee that processes do not
interfere with each others' computations.
The safest way to protect the state of one process from another would be to copy the current
information to disk. However, a process switch would then take seconds—far too long for a
time-sharing environment.
This problem is solved by operating systems partitioning main memory so that several dif-
ferent processes have their state in memory at the same time. This division means that the op-
erating system designer needs help from the computer designer to provide protection so that
one process cannot modify another. Besides protection, the computers also provide for shar-
ing of code and data between processes, to allow communication between processes or to save
memory by reducing the number of copies of identical information.
Protecting Processes
Processes can be protected from one another by having their own page tables, each pointing to
distinct pages of memory. Obviously, user programs must be prevented from modifying their
page tables or protection would be circumvented.
Protection can be escalated, depending on the apprehension of the computer designer or the
purchaser. Rings added to the processor protection structure expand memory access protec-
tion from two levels (user and kernel) to many more. Like a military classification system of
top secret, secret, confidential, and unclassified, concentric rings of security levels allow the
 
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