Hardware Reference
In-Depth Information
The miss penalty is the same time in each case, so we leave it as 25 clock
cycles. For example, the average memory access time for a 4 KB direct-mapped
cache is
and the time for a 512 KB, eight-way set associative cache is
Using these formulas and the miss rates from Figure B.8 , Figure B.13 shows
the average memory access time for each cache and associativity. The igure
shows that the formulas in this example hold for caches less than or equal to 8
KB for up to four-way associativity. Starting with 16 KB, the greater hit time of
larger associativity outweighs the time saved due to the reduction in misses.
FIGURE B.13 Average memory access time using miss rates in Figure
B.8 for parameters in the example . Boldface type means that this time is
higher than the number to the left, that is, higher associativity increases aver-
age memory access time.
Note that we did not account for the slower clock rate on the rest of the pro-
gram in this example, thereby understating the advantage of direct-mapped
cache.
 
Search WWH ::




Custom Search