Hardware Reference
In-Depth Information
If there are n blocks in a set, the cache placement is called n-way set associative .
FIGURE B.2 This example cache has eight block frames and memory has 32 blocks .
The three options for caches are shown left to right. In fully associative, block 12 from the
lower level can go into any of the eight block frames of the cache. With direct mapped, block
12 can only be placed into block frame 4 (12 modulo 8). Set associative, which has some of
both features, allows the block to be placed anywhere in set 0 (12 modulo 4). With two blocks
per set, this means block 12 can be placed either in block 0 or in block 1 of the cache. Real
caches contain thousands of block frames, and real memories contain millions of blocks. The
set associative organization has four sets with two blocks per set, called two-way set associat-
ive . Assume that there is nothing in the cache and that the block address in question identifies
lower-level block 12.
The range of caches from direct mapped to fully associative is really a continuum of levels
of set associativity. Direct mapped is simply one-way set associative, and a fully associative
cache with m blocks could be called “ m- way set associative.” Equivalently, direct mapped can
be thought of as having m sets, and fully associative as having one set.
The vast majority of processor caches today are direct mapped, two-way set associative, for
four-way set associative, for reasons we will see shortly.
 
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