Review of Memory Hierarchy - Computer Architecture: A Quantitative Approach - page 552

Some designers prefer measuring miss rate as misses per instruction rather than misses per
memory reference. These two are related:
The later formula is useful when you know the average number of memory accesses per in-
struction because it allows you to convert miss rate into misses per instruction, and vice versa.
For example, we can turn the miss rate per memory reference in the previous example into
misses per instruction:
By the way, misses per instruction are often reported as misses per 1000 instructions to show
integers instead of fractions. Thus, the answer above could also be expressed as 30 misses per
1000 instructions.
The advantage of misses per instruction is that it is independent of the hardware imple-
mentation. For example, speculative processors fetch about twice as many instructions as
are actually commited, which can artiicially reduce the miss rate if measured as misses per
memory reference rather than per instruction. The drawback is that misses per instruction is
architecture dependent; for example, the average number of memory accesses per instruction
may be very different for an 80×86 versus MIPS. Thus, misses per instruction are most popular
with architects working with a single computer family, although the similarity of RISC archi-
tectures allows one to give insights into others.
Example
To show equivalency between the two miss rate equations, let's redo the ex-
ample above, this time assuming a miss rate per 1000 instructions of 30. What is
memory stall time in terms of instruction count?
Answer
Recomputing the memory stall cycles: