Instruction Set Principles - Computer Architecture: A Quantitative Approach - page 545

FIGURE A.31 Data on offset size for the Alpha architecture with full optimization for SPEC
CPU2000.
A.21 [20/20] <A.3, A.6, A.9> The size of displacement values needed for the displacement ad-
dressing mode or for PC-relative addressing can be extracted from compiled applications.
Use a disassembler with one or more of the SPEC CPU2006 benchmarks compiled for the
MIPS processor.
a. [20] <A.3, A.9> For each instruction using displacement addressing, record the dis-
placement value used. Create a histogram of displacement values. Compare the res-
ults to those shown in this chapter in Figure A.8 .
b. [20] <A.6, A.9> For each branch instruction using PC-relative addressing, record the
displacement value used. Create a histogram of displacement values. Compare the
results to those shown in this chapter in Figure A.15 .
A.22 [15/15/10/10] <A.3> The value represented by the hexadecimal number 434F 4D50 5554
4552 is to be stored in an aligned 64-bit double word.
a. [15] <A.3> Using the physical arrangement of the first row in Figure A.5 , write the
value to be stored using Big Endian byte order. Next, interpret each byte as an ASCII