Hardware Reference
In-Depth Information
A
Instruction Set Principles
Wilkes and Renwick, Selection from the List of 18 Machine, Instructions for the EDSAC (1949)
An
Add the number in storage location n into the accumulator.
En
If the number in the accumulator is greater than or equal to zero execute next the order which
stands in storage location n; otherwise proceed serially.
Z
Stop the machine and ring the warning bell.
This appendix concentrates on instruction set architecture—the portion of the computer visible
to the programmer or compiler writer. This appendix introduces the wide variety of design al-
ternatives available to the instruction set architect. In particular, it focuses on four topics. First, it
presents a taxonomy of instruction set alternatives and gives some qualitative assessment of the
advantages and disadvantages of various approaches. Second, it presents and analyzes some
instruction set measurements that are largely independent of a specific instruction set. Third, it
addresses the issue of languages and compilers and their bearing on instruction set architecture.
Finally, the “Puting It All Together” section shows how these ideas are relected in the MIPS
instruction set, which is typical of RISC architectures. It concludes with fallacies and pitfalls of
instruction set design.
A.1 Introduction
A.2 Classifying Instruction Set Architectures
A.3 Memory Addressing
A.4 Type and Size of Operands
A.5 Operations in the Instruction Set
A.6 Instructions for Control Flow
A.7 Encoding an Instruction Set
A.8 Crosscuting Issues: The Role of Compilers
A.9 Puting It All Together: The MIPS Architecture
A.10 Fallacies and Pitfalls
A.11 Concluding Remarks
A.12 Historical Perspective and References
Exercises by Gregory D. Peterson
A.1 Introduction
In this appendix we concentrate on instruction set architecture—the portion of the computer
visible to the programmer or compiler writer. Most of this material should be review for readers
 
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