Thread-Level Parallelism - Computer Architecture: A Quantitative Approach - page 384

An Example Directory Protocol
The basic states of a cache block in a directory-based protocol are exactly like those in a snoop-
ing protocol, and the states in the directory are also analogous to those we showed earlier.
Thus, we can start with simple state diagrams that show the state transitions for an individual
cache block and then examine the state diagram for the directory entry corresponding to each
block in memory. As in the snooping case, these state transition diagrams do not represent
all the details of a coherence protocol; however, the actual controller is highly dependent on
a number of details of the multiprocessor (message delivery properties, buffering structures,
and so on). In this section, we present the basic protocol state diagrams. The knoty issues in-
volved in implementing these state transition diagrams are examined in Appendix I.
Figure 5.22 shows the protocol actions to which an individual cache responds. We use the
same notation as in the last section, with requests coming from outside the node in gray and
actions in bold. The state transitions for an individual cache are caused by read misses, write
misses, invalidates, and data fetch requests; Figure 5.22 shows these operations. An individu-
al cache also generates read miss, write miss, and invalidate messages that are sent to the
home directory. Read and write misses require data value replies, and these events wait for
replies before changing state. Knowing when invalidates complete is a separate problem and
is handled separately.