Thread-Level Parallelism - Computer Architecture: A Quantitative Approach - page 376

instruction cache misses are roughly one-sixth of the OS rate, across the variety of cache sizes.
This partially accounts for the fact that, although the user code executes nine times as many
instructions as the kernel, those instructions take only about four times as long as the smaller
number of instructions executed by the kernel.
Performance Of The Multiprogramming And OS Workload
In this subsection, we examine the cache performance of the multiprogrammed workload as
the cache size and block size are changed. Because of differences between the behavior of the
kernel and that of the user processes, we keep these two components separate. Remember,
though, that the user processes execute more than eight times as many instructions, so that the
overall miss rate is determined primarily by the miss rate in user code, which, as we will see,
is often one-fifth of the kernel miss rate.
Although the user code executes more instructions, the behavior of the operating system
can cause more cache misses than the user processes for two reasons beyond larger code size
and lack of locality. First, the kernel initializes all pages before allocating them to a user, which
signiicantly increases the compulsory component of the kernel's miss rate. Second, the kernel
actually shares data and thus has a nontrivial coherence miss rate. In contrast, user processes
cause coherence misses only when the process is scheduled on a different processor, and this
component of the miss rate is small.
Figure 5.17 shows the data miss rate versus data cache size and versus block size for the ker-
nel and user components. Increasing the data cache size affects the user miss rate more than it
affects the kernel miss rate. Increasing the block size has beneficial effects for both miss rates,
since a larger fraction of the misses arise from compulsory and capacity, both of which can be
potentially improved with larger block sizes. Since coherence misses are relatively rarer, the
negative effects of increasing block size are small. To understand why the kernel and user pro-
cesses behave differently, we can look at how the kernel misses behave.