Data-Level Parallelism in Vector, SIMD, and GPU Architectures - Computer Architecture: A Quantitative Approach - page 259

4
Data-Level Parallelism in Vect-
or, SIMD, and GPU Architec-
tures
We call these algorithms data parallel algorithms because their parallelism comes from simultan-
eous operations across large sets of data, rather than from multiple threads of control.
W. Daniel Hillis and Guy L. Steele
“Data Parallel Algorithms,” Comm. ACM (1986)
If you were plowing a field, which would you rather use: two strong oxen or 1024 chickens?
Seymour Cray, Father of the Supercomputer
(arguing for two powerful vector processors versus many simple processors)
4.1 Introduction 262
4.2 Vector Architecture
4.3 SIMD Instruction Set Extensions for Multimedia
4.4 Graphics Processing Units
4.5 Detecting and Enhancing Loop-Level Parallelism
4.6 Crosscutting Issues
4.7 Putting It All Together: Mobile versus Server GPUs and Tesla versus Core i7
4.8 Fallacies and Pitfalls
4.9 Concluding Remarks
4.10 Historical Perspective and References
Case Study and Exercises by Jason D. Bakos