Memory Hierarchy Design - Computer Architecture: A Quantitative Approach - page 94

FIGURE 2.11 Summary of 10 advanced cache optimizations showing impact on cache
performance, power consumption, and complexity . Although generally a technique helps
only one factor, prefetching can reduce misses if done sufficiently early; if not, it can reduce
miss penalty. + means that the technique improves the factor, − means it hurts that factor, and
blank means it has no impact. The complexity measure is subjective, with 0 being the easiest
and 3 being a challenge.
2.3 Memory Technology and Optimizations
… the one single development that put computers on their feet was the invention of a reliable form
of memory, namely, the core memory. … Its cost was reasonable, it was reliable and, because it
was reliable, it could in due course be made large. [p. 209]
Maurice Wilkes
Memoirs of a Computer Pioneer (1985)
Main memory is the next level down in the hierarchy. Main memory satisfies the demands
of caches and serves as the I/O interface, as it is the destination of input as well as the source
for output. Performance measures of main memory emphasize both latency and bandwidth.
Traditionally, main memory latency (which affects the cache miss penalty) is the primary con-