Memory Hierarchy Design - Computer Architecture: A Quantitative Approach - page 86

write buffer entry. If so, the new data are combined with that entry. Write merging is the name
of this optimization. The Intel Core i7, among many others, uses write merging.
If the buffer is full and there is no address match, the cache (and processor) must wait until
the buffer has an empty entry. This optimization uses the memory more efficiently since mul-
tiword writes are usually faster than writes performed one word at a time. Skadron and Clark
[1997] found that even a merging four-entry write buffer generated stalls that led to a 5% to
10% performance loss.
The optimization also reduces stalls due to the write buffer being full. Figure 2.7 shows a
write buffer with and without write merging. Assume we had four entries in the write buffer.
and each entry could hold four 64-bit words. Without this optimization, four stores to sequen-
tial addresses would fill the buffer at one word per entry, even though these four words when
merged exactly fit within a single entry of the write buffer.
FIGURE 2.7 To illustrate write merging, the write buffer on top does not use it while the
write buffer on the bottom does . The four writes are merged into a single buffer entry with
write merging; without it, the buffer is full even though three-fourths of each entry is wasted.
The buffer has four entries, and each entry holds four 64-bit words. The address for each
entry is on the left, with a valid bit (V) indicating whether the next sequential 8 bytes in this
entry are occupied. (Without write merging, the words to the right in the upper part of the fig-
ure would only be used for instructions that wrote multiple words at the same time.)
Note that input/output device registers are often mapped into the physical address space.
These I/O addresses cannot allow write merging because separate I/O registers may not act
like an array of words in memory. For example, they may require one address and data word
per I/O register rather than use multiword writes using a single address. These side effects are