MODELING AND BUDGETING OF TIMING JITTER AND NOISE - Advanced Signal Integrity for High-Speed Digital Design - page 597

Z odd = 50 Ω

+ +

50 Ω

02 mA
100 Ω

50 Ω

− −

Z odd = 50 Ω

Figure 13-30 Open-drain signaling system for Problem 13-6.

13-8 Use the pulse response data from the second column of Table 13-6 to
calculate the waveform for a 1101000 pattern.
13-9 An interesting aspect of the PDA equations is that they account automat-
ically for the positional dependence of the worst-case bit pattern without
explicitly determining the actual patterns. However, sometimes we may
wish to know the worst-case pattern(s). Develop an algorithm for finding
the bit patterns that result in the worst-case signal waveform for both a
logical zero and a logical 1.
13-10 Calculate the actual total jitter distribution for the PCI Express system in
Example 13-2. Use the DJ and RJ values from Table 13-2, assume that
the individual DJ components fit a dual Dirac distribution, and convolve
the DJ distributions to find the total TJ.
13-11 Explain why PDA is not applicable for the open-drain system shown in
Figure 13-31.

V TT

R TT

v out

i out

R S

Figure 13-31 Open-drain signaling system for Problem 13-11.

13-12 Use peak distortion analysis to determine the worst-case waveform from
the pulse response shown in Figure 13-32.
13-13 Outline the method that you would use to perform peak distortion analysis
on a differential system, including the effects of crosstalk.
13-14 Propose a method for performing peak distortion analysis using the step
response rather than the pulse response. What would be the advantage
of using the step response?