Digital Signal Processing Reference
In-Depth Information
TABLE 13-4. 0.25- µ m Process Parameter Variation
for Inverter Offset Estimation
v t, min
v t, max
v TN
(V)
0 . 042
0 . 044
v TP
(V)
0 . 039
0 . 041
A/V 2 )
k N
(
127
103
µ
A/V 2 )
k P
(
27
33
µ
W N
(
m)
0 . 87
1 . 37
µ
W P
(
m)
3 . 75
4 . 25
µ
L N
(
m)
0 . 25
0 . 75
µ
L P
(
m)
0 . 75
0 . 25
µ
V DD
(V)
2 . 25
2 . 75
Equation (13-26) shows that the offset of the differential receiver depends
on the ratio of variation in device width to device length. As a result, feature
size variations will cancel each other. This allows us to reduce the offset by
designing the receiver with the minimum gate length, which has the added benefit
of minimizing the device area and input capacitance. We can also reduce the
receiver offset by increasing the device width. Choosing a device width of 1
m
µ
with a minimum length gives us an estimated offset of
30 mV for the differential
receiver, for an input gate bias, v GS v TN , of 400 mV:
±
2 (v GS v TN ) k N
k N
W
W
L
L
v offset
= v TN +
0 . 01 V ) ( 12
A / V 2 )( 0 . 025
m )( 0 . 25
m )
µ
µ
µ
=
0 . 01 V
+
2 ( 0 . 4V
A / V 2 )( 1
( 115
µ
µ
m )( 0 . 025
µ
m )
=
30 mV
V REF Noise As we described in Chapter 12, we can use differential amplifiers to
receive signal-ended signals by connecting one of the inputs to a reference voltage
(see Figure 11-33). Examples of high-speed single-ended interfaces that employ
this approach include the GTL
technology used with Intel microprocessors
and the stub series terminated logic (SSTL) interface used with dual-data-rate
(DDR) memory devices [Intel, 1997; JEDEC, 2002]. The reference voltage is
often generated as part of a low current voltage regulator and distributed to
the on-chip circuits through the printed circuit board and packages, making it
susceptible to noise from nearby signals and reference planes. Typical ac noise
specifications are
+
2% of the reference voltage. In addition, some standards allow
for dc offset in the reference voltage. For example, the high-speed transceiver
logic (HSTL) specification allows the dc value of the reference to vary between
0.68 and 0.90 V from a nominal value of 0.75 V while restricting the ac noise
to a maximum of
±
±
2% of the actual reference (e.g., 18 mV for V ref
=
0 . 9V)
[EIA, 1995].
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