MODELING AND BUDGETING OF TIMING JITTER AND NOISE - Advanced Signal Integrity for High-Speed Digital Design - page 544

13

MODELING AND BUDGETING
OF TIMING JITTER AND NOISE

13.1 Eye diagram 550

13.2 Bit error rate 552

13.2.1 Worst-case analysis 552

13.2.2 Bit error rate analysis 555

13.3 Jitter sources and budgets 560

13.3.1 Jitter types and sources 561

13.3.2 System jitter budgets 568

13.4 Noise sources and budgets 572

13.4.1 Noise sources 572

13.4.2 Noise budgets 579

13.5 Peak distortion analysis methods 583

13.5.1 Superposition and the pulse response 583

13.5.2 Worst-case bit patterns and data eyes 585

13.5.3 Peak distortion analysis including crosstalk 594

13.5.4 Limitations 599

13.6 Summary 600

References 600

Problems 601

This chapter ties together the concepts presented in previous chapters with the
intent of providing the reader with a method for managing timing noise and
voltage noise successfully in order to create a successful multi-Gb/s design. We
start by introducing the eye diagram as a tool for evaluating the performance of
a signaling interface, introducing eye width and eye height as key metrics. The
eye diagram is also a fundamental prerequisite to understanding the bit error rate
(BER) of a link. Modern high-speed interfaces are designed to a specified BER