Digital Signal Processing Reference
In-Depth Information
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.2
1.0
0.5
0.0
0.5
1.0
Time (ns)
(c)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.2
1.0
0.5
0.0
0.5
1.0
Time (ns)
(d)
Figure 11-9
( Continued )
a nonlinear behavioral model typically contains the load conditions under which
the curves were constructed. Simulation tools use this information, typically in the
form of an IBIS model (see Section 11.10), to adjust the model for the differing
load conditions encountered when it is used in simulations of real interconnect
systems.
The device capacitance may also be included, if it is not already comprehended
in the transient voltage versus time curves of the model. However, models created
from either transistor-based simulations or from measurements typically include
the effects of the capacitance, in which case it should not be explicitly called out
in the model. Construction of the i out versus v out curves is discussed further in
Section 11.10.
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