I/O CIRCUITS AND MODELS - Advanced Signal Integrity for High-Speed Digital Design - page 439

11

I/O CIRCUITS AND MODELS

11.1 I/O design considerations 444

11.2 Push-pull transmitters 446

11.2.1 Operation 446

11.2.2 Linear models 448

11.2.3 Nonlinear models 453

11.2.4 Advanced design considerations 455

11.3 CMOS receivers 459

11.3.1 Operation 459

11.3.2 Modeling 460

11.3.3 Advanced design considerations 460

11.4 ESD Protection circuits 460

11.4.1 Operation 461

11.4.2 Modeling 461

11.4.3 Advanced design considerations 463

11.5 On-chip termination 463

11.5.1 Operation 463

11.5.2 Modeling 463

11.5.3 Advanced design considerations 464

11.6 Bergeron diagrams 465

11.6.1 Theory and method 470

11.6.2 Limitations 474

11.7 Open-drain transmitters 474

11.7.1 Operation 474

11.7.2 Modeling 476

11.7.3 Advanced design considerations 476

11.8 Differential current-mode transmitters 479

11.8.1 Operation 479

11.8.2 Modeling 480

11.8.3 Advanced design considerations 480

11.9 Low-swing and differential receivers 481

11.9.1 Operation 481

11.9.2 Modeling 482