INTRODUCTION: THE IMPORTANCE OF SIGNAL INTEGRITY - Advanced Signal Integrity for High-Speed Digital Design - page 6

sending and receiving series of trapezoidal voltage signals in which a high voltage
is a 1 and a low voltage is a 0. The conductive paths carrying the digital sig-
nals are known as interconnects . The interconnect includes the entire electrical
pathway from the chip sending a signal to the chip receiving the signal. This
includes the chip packages, connectors, sockets, transmission lines, and vias. A
group of interconnects is referred to as a bus . The region of voltage where a
digital receiver distinguishes between a high and a low voltage is known as the
threshold region . Within this region, the receiver will either switch high or switch
low. On the silicon, the actual switching voltages vary with temperature, supply
voltage, silicon process, and other variables. From the system designer's point
of view, there are usually high- and low-voltage thresholds, known as V ih and
V il , associated with the receiving silicon, above and below which a high or low
value is guaranteed to be received under all conditions. Thus, the designer must
guarantee that the system can, under all conditions, deliver high voltages that
do not, even briefly, fall below V ih , and low voltages that remain below V il ,to
ensure the integrity of the data.
To maximize the speed of operation of a digital system, the timing uncertainty
of a transition through the threshold region must be minimized. This means that
the rise or fall time of the digital signal must be as fast as possible. Ideally,
an infinitely fast edge rate would be used, although there are many practical
problems that prevent this. Realistically, edge rates as fast as 35 ps are encoun-
tered in real systems. The reader can use Fourier analysis to verify that the
quicker the edge rate, the higher the frequencies that are found in the spec-
trum of the signal. Herein lies a clue to the difficulty. Every conductor has a
frequency-dependent capacitance, inductance, conductance, and resistance. At a
high-enough frequency, none of these things are negligible. Thus, a wire is no
longer a wire but a distributed, frequency-dependent parasitic element that has
delay and a transient impedance profile that can cause distortions and glitches
to manifest themselves on the waveform propagating from the driving chip
to the receiving chip. The wire is now an element that is coupled to every-
thing around it, including power and ground structures, heat sinks, other traces,
and even the wireless network. The signal is not contained in the conductor
itself but is, instead, carried in the local electric and magnetic fields around
the conductor. The signals on one interconnect will affect, and be effected
by, the signals on another. The inductance, capacitance, and resistance of all
the structures in the vicinity of the interconnect have vital roles in the simple
task of guaranteeing proper signaling transitions with appropriate timing at the
receiver.
One of the most difficult aspects of high-speed design is the fact that there are
many codependent variables that affect the outcome of a digital design. Some
of the variables are controllable, and others force the designer to live with the
random variation. One of the difficulties in high-speed design is how to han-
dle the many variables, whether they are controllable or uncontrollable. Often,
simplifications can be made by neglecting or assuming values for variables,
but this can lead to unknown failures down the road for which it will not be