INTRODUCTION: THE IMPORTANCE OF SIGNAL INTEGRITY - Advanced Signal Integrity for High-Speed Digital Design - page 4

used to sculpt the chip. Interactions between ever-closer wires were about to
ruin the signals. Chips would soon generate so much heat that they would be
impossible to cool without a refrigeration unit. The list goes on [Moravec, 1998].
A look at the computer growth graph shows that the industry found solutions
to all those problems. Chip progress not only continued— it sped up . Technol-
ogy companies, motivated by the potential of high profits, dedicated tremendous
resources to making the “impossible” possible: developing more efficient transis-
tor designs, better heat sinks, new manufacturing processes, and more advanced
analysis techniques. History indicates that the rate of performance will continue
to grow at exponential rates.
Historically, the mechanism for advancing computation has been to miniaturize
components, allowing more devices to fit in and operate in a smaller space, thus
producing more performance per unit volume. First, the gears in mechanical
calculators shrunk, which allowed them to spin faster. Then the relays in electro-
mechanical machines became smaller, which allowed them to switch faster. Next,
the switches in digital machines evolved from shotgun shell-sized vacuum tubes,
to pea-sized transistors, to tiny integrated-circuit chips [Moravec, 1998]. Each of
these technological advancements came with a price: New problems that were
never before considered arose that needed to be solved .
How does this relate to signal integrity? The field of signal integrity arose
directly from the exponential growth of computing power. A computer system is
comprised of many integral components in addition to the processor, such as the
memory, cache, and chip set. The interconnections between these parts within a
computer system are known collectively as system buses . Essentially, a bus is an
integrated set of interconnections used to transfer data between different parts of
a digital system. Accordingly, to capitalize on the benefits of increased processor
power, system buses must also operate at higher data transfer rates. For example,
if the memory bus fails to transmit data at a sufficiently fast rate, the processor
simply sits idle until data are available. This bottleneck would negate much of
the performance gained from a more powerful processor. Subsequently, it is vital
that the bus performance scale correspondingly with processor performance.
1.2 THE PROBLEM
The two mechanisms used historically to scale bus design to feed the growing
performance of computer processors have been speed and width. Speed facilitates
higher information transfer rates by sending more bits in a given amount of time.
Width facilitates more information transfer by sending more bits in parallel. From
now on, the rate of information transfer on a bus will be referred to as the bus
bandwidth .
Increasing the bus speed to overcome bandwidth limitations becomes prob-
lematic for many reasons. As bus frequencies increase in speed, the pathways
that comprise the bus, called interconnects , begin to exhibit high-frequency
behavior, which thoroughly puzzles many conventional digital designers. What is