Digital Signal Processing Reference
In-Depth Information
By observing the lattice diagram, we see that the voltage at receiver 2 at
t
=
750
ps is calculated by accounting for the voltage reflected from receiver 1 at
t
=
375
ps and transmitted into the junction at
t
=
500 ps:
2
3
2
3
(
1
)
=
4
3
+
2
3
2
3
20
9
v
B
=
v
A
+
T
3
v
b
+
T
3
v
b
5
=
+
This process can be continued until the waveform has reached steady state. The
complete waveforms for this example are shown in Figure 3-36, with the first
few reflections (just calculated) labeled. Note that the complicated interactions
between the reflections from each leg severely degrade the integrity of the signal.
As more legs are added to the topology, it becomes more sensitive to differences
in the electrical length of the legs. Furthermore, a mismatch between the source
resistance and the characteristic impedance of line, differences between receiver
loads, and impedance deltas between each leg will cause similar instabilities.
l
2
z
0
l
1
v
s
Receiver 1
R
s
=
Z
0
z
0
l
2
>
l
3
z
0
0-2
V
Receiver 2
2.5
52
Receiver 1
27
2
4
3
1.5
1
8
0.5
9
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0.5
−
Time, ns
20
2.5
9
Receiver 2
2
4
3
1.5
1
0.5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
−
0.5
Figure 3-36
Signal integrity of a T-topology when the leg lengths are not equal.
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