Digital Signal Processing Reference
In-Depth Information
will give a total magnitude at the source end
v
B
=
v
a
+
v
b
+
v
c
=
0
.
8
+
0
.
8
+
0
.
16
1
.
76 V, with the reflected portion
v
c
of 0.16 V traveling toward the load.
This process is repeated until the voltage reaches a steady-state value of 2 V. If
the same procedure is applied to the falling edge of a digital waveform, the signal
integrity of a digital pulse propagating on this system can be calculated, as shown
in Figure 3-31c. Notice how the reflections give the waveform a “stair-step”
appearance at the receiver (node B), even though the unloaded output of the
voltage source is a square wave. This effect occurs when the source impedance
(
R
s
) is larger than the characteristic impedance (
Z
0
) and is referred to as an
underdriven transmission line
.
=
Example 3-5
Multiple Reflections for
R
s
<Z
0
When the characteristic
impedance of the transmission line is greater than the source impedance, as
shown in Figure 3-32a, the reflection coefficient looking into the source will be
negative:
25
−
50
1
3
source
=
50
=−
25
+
When the lattice diagram is solved, as shown in Figure 3-32b, it is easy to
show that a negative reflection at the source will produce a “ringing” effect.
This is known as an
overdriven transmission line
. The resulting distorted digital
waveform is shown in Figure 3-32c. Since the procedure for solving the lattice
diagram is identical to Example 3-3, the exercise is left to the reader.
3.5.5 Lattice Diagrams for Nonideal Topologies
Real bus designs rarely employ only a single transmission line. For example,
even in point-to-point designs, the silicon driver is connected to the main bus
through a package, which often employs transmission lines anywhere from 0.25
to 1.0 in. long. Also, many high-speed designs use add-in cards, where two
separately manufactured printed circuit boards are interfaced through a connector.
Furthermore, it is not uncommon to encounter designs where one driver is sending
data to multiple receivers, such as a front-side bus of a multiprocessor system,
necessitating the solution of multiple reflections in parallel. Consequently, it
is important to explore techniques for understanding and solving systems with
multiple transmission-line segments in a variety of topologies.
Cascaded Topologies
Consider the transmission-line structure depicted in
Figure 3-33, which consists of two transmission-line segments cascaded in
series. The first section is of length
l
1
and has a characteristic impedance of
Z
01
ohms. The second section is of length
l
2
and has an impedance of
Z
02
ohms. Finally, the structure is terminated with a value of
R
t
. When the signal
encounters the
Z
01
:
Z
02
impedance junction, part of the signal (
v
c
) will be
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