Environmental Engineering Reference
In-Depth Information
2.5 COMMON Y (BASE/GATE)
The
common Y
(CY) configuration is generally exploited for its current
following capability. In this configuration the X terminal is the input and Z
is the output. Figure 2.8a depicts a general common Y topology where
resistance
which is not strictly necessary, is again included to generalise
the analysis.
The input resistance, seen by input generator, in Fig. 2.8a, can be
found by replacing the transistor with its model and writing the KCL at node
X (we can simplify calculation by ideally removing resistance
and
considering its effect later)
